Same MIPs project, just doing the report Project Content part(80 pts) in page 8, the whole project is in the zip file. Need to be done ASAP
project2_v1.pdf
p2.zip
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UIC – ECE 366: Computer Organization – Spring 2019
Project 2: MIPS SIM on Python
For this project, you will work in group to implement a python program, which takes as input a text
file containing some MIPS code (represented as machine code in hex), and simulate the running of
this program, similar to MARS, and output the results. Your project should eventually show three
components: 1) a Python simulator, 2) a number of test cases in MIPS machine code, and 3) a PRPG
program in MIPS machine code, where 2) and 3) should successfully run on 1).
1) Specifics for the Python simulator
Your simulator should support the following:
• Minimum subset of instructions:
o addi, addu, sub, slt, and, ori, sll, srl beq, bne, lw, sw
• Other allowed instructions that your PRPG might use:
o add, slti, sltu, lui, andi, or, xor, xori, j
• One “special instruction” of your choice, if you decide to pursue the 10pts extra credit
o Needed to be approved by the instructor
• Registers:
o $0 (always = 0)
o $8 – $23
o PC: starting at 0, increment by 4
• Minimum memory address range:
o [0x2000, 0x2050]
Other assumptions:
• You can assume all the registers / data memory content are initialized to be 0
• The program will end with the machine code 0x1000FFFF
o – equivalent to
end: beq $0, $0, end
Input:
• A text file containing a valid MIPS program, represented in hex
• (optional) User input indicating various running mode – for example, debug mode (output
more info, step-by-step), or regular run (minimum output until the end).
Output:
• On screen or into a text file, nicely formatted:
a) Register content ($8 – $23, PC)
b) Memory content (0x2000 – 0x2050)
c) Instruction Count
d) Other helpful info (such as current instruction, etc)
2) Test cases in MIPS machine code – 4 given, 4 by your design
1: test cases for arithmetic instructions {addi, addu, sub, slt}
•
test case 1A:
#1A
0x20080019
0x2108ffdc
0x01084821
0x01284821
0x00095022
0x010a4822
0x0009502a
0x010a582a
0x1000ffff
•
#addi $8, $0, 25
#addi $8, $8, -36
#addu $9, $8, $8
#addu $9, $9, $8
#sub $10, $0, $9
#sub $9, $8, $10
#slt $10, $0, $9
#slt $11, $8, $10
#end: beq $0, $0, end
test case 1B:
a) Your design – must include all the arithmetic instructions supported by your simulator
2: test cases for logic instructions {and, ori, sll, srl}
• test case 2A:
#2A
0x34080019
0x3509abcd
0x340aff00
0x012a5024
0x00094c00
0x3529ef80
0x000958c2
0x000b6042
0x1000ffff
•
#ori
#ori
#ori
#and
#sll
#ori
#srl
#srl
$8, $0, 25
$9, $8, 0xabcd
$10, $0, 0xff00
$10, $9, $10
$9, $9, 16
$9, $9, 0xEF80
$11, $9, 3
$12, $11, 1
test case 2B:
a) Your design – must include all the logic instructions supported by your simulator
3: test cases for branch instructions {beq, bne} + arithmetic + logic
• test case 3A:
#3A
0x20080020
0x3409abcd
0x00094c00
0x3529ef12
0x200a0001
0x00005821
0x012a6024
0x11800001
0x216b0001
0x00094842
0x2108ffff
0x1500fffa
0x1000ffff
•
#.asm for 3A
addi $8, $0, 32
ori $9, $0, 0xabcd
sll $9, $9, 16
ori $9, $9, 0xef12
addi $10, $0, 1
addu $11, $0, $0
loop:
and $12, $9, $10
beq $12, $0, skip
addi $11, $11, 1
skip:
srl $9, $9, 1
addi $8, $8, -1
bne $8, $0, loop
end:
beq $0, $0, end
test case 3B:
a) Your design – must include both beq and bne (and j if your simulator supports it).
4: test cases for memory instructions {sw, lw} + arithmetic
• test case 4A:
#4A
0x20082000
0x2009fffe
0xad090000
0xad090004
0xad080008
0x21080014
0xad09fffc
0xad09fff8
0xad080000
0x8d0bfff4
0x8d6b0000
0x1000ffff
•
#.asm for 4A
addi $8, $0, 0x2000
addi $9, $0, -2
sw $9, ($8)
sw $9, 4($8)
sw $8, 8($8)
addi $8, $8, 20
sw $9, -4($8)
sw $9, -8($8)
sw $8, ($8)
lw $11, -12($8)
lw $11, ($11)
end: beq $0, $0, end
test case 4B:
a) Your design – must include both lw and sw instructions.
You should be able to use MARS to help verifying your code. For example, the behavior of 4A can
be checked by MARs.
You can use MARS to come up with testing programs and
derive machine code. This hex list should be the input file
(such as mc.txt) of your Python code.
In the end, MARS can tell you the
content of all the registers, and
PC value. Your python code
should be able to report the
same.
MARS shows the content of memory, from 0x2000 on, in increment of 4. Your python simulator should
be able to keep track from 0x2000 to 0x2050, and produce matching results.
MARS reports the total
Instruction Count and
instruction statistics.
Yours should match.
3) PRPG program
Similar to project 1, you should compose a MIPS program to produce a sequence of 16 pseudo-random
patterns, and evaluate their quality.
Part A):
• Your program should begin with addi $8, $0, ___ to initialize the seed (S0)
• You can choose among the 7 algorithms to produce S(i+1) from S(i)2,
assuming S(i)2 has b31, b30, …, b0:
a) drop middle 16 (same as Project 1)
S(i+1):
b31
b30
b29
b28
b27
b26
b25
b24
b7
b6
b5
b4
b3
b2
b1
b0
b20
b19
b18
b17
b16
b15
b14
b13
b12
b11
b10
b9
b8
b12
b11
b10
b9
b8
b7
b6
b5
b4
b3
b2
b1
b0
~b10
~b9
~b8
~b7
~b6
~b5
~b4
~b3
~b2
~b1
~b0
b) drop two ends of 8
S(i+1):
b23
b22
b21
c) drop upper 16
S(i+1):
b15
b14
b13
d) drop upper 16 then flip
S(i+1):
~b15
~b14
~b13
~b12
~b11
e) drop upper 16 then mirror lower 16
S(i+1):
b0
b1
b2
b3
b4
b5
b6
b7
b8
b9
b10
b11
b12
b13
b14
b15
b24
b22
b20
b18
b16
b14
b12
b10
b8
b6
b4
b2
b0
b25
b23
b21
b19
b17
b15
b13
b11
b9
b7
b5
b3
b1
f) drop odd bits
S(i+1):
b30
b28
b26
g) drop even bits
S(i+1):
•
b31
b29
b27
Your program should store S0 – S5 in Memory location [0x2010] – [0x204C].
Part B):
•
•
(new) Your program should compute the average of S0 – S15, and store the result in
M[0x200C]
(same as project 1 Bi) Your program should compute the average Hamming Weight of S0 –
S15, and store the result in M[0x2000]
Bb Submission Instructions:
Deadline: Feb 28th Thu – submit all the required files on Bb by 11:59 (end of day), individually.
Late submission policy and penalty:
extra day
1
2
3
4
late penalty on total score
5%
10%
15%
20%
For each person, include the following files in your Bb submission:
1. group_x_p2_report.pdf:
a self-contain PDF report writeup
2. group_x_p2_sim.py:
Python simulator code
3. group_x_p2_prpg.txt:
MIPS machine code for the prpg program
4. group_x_p2_1B.txt:
o MIPS machine code by your design to test the arithmetic instructions
addi, addu, sub, slt
5. group_x_p2_2B.txt:
o MIPS machine code by your design to test the logic instructions
and, ori, sll, srl
6. group_x_p2_3B.txt:
o MIPS machine code by your design to test the branch instructions
beq, bne
7. group_x_p2_4B.txt:
o MIPS machine code by your design to test the memory instructions
lw, sw
Report (group_x_p2_report.pdf ) components:
Activity Log (20pts)
I) Table of group activity – for example:
Time / Location
Activity
Achieved / To-Do
Member(s)
Week
5,
Tu
5:30pm – 7pm @
Library 2nd floor
In-person
group
meeting
Done:
To-do:
–
Alice
Bob
Charlie
Week 5, Sat 10pm,
Online via Google
Doc / GitHub
Update /
Milestone
…
II) List of activities by yourself
python installation and testing for all
run testcases 1A – 4A
homework 2 discussion
PRPG selection discussion
re-write PRPG code to minimize instruction
usage and convert to hex
write testcases 1B – 4B
write a python code that runs arithmetic code
Done:
– python code for arithmetic code runs correctly
for addi, addu, sub, slt – submitted by Alice
– test case 1A passed
– test case 1B finished, passed, and uploaded
To-do:
– continue to work on logic instructions 2A and
test case 2B
Alice
Charlie
Project Content (80pts)
I) Test cases (40pts)
Show the results and screenshots of your python simulator for the following test cases:
1.
2.
3.
4.
Arithmetic instructions for 1A and 1B
Logic instructions for 2A and 2B
Branch instructions for 3A and 3B
Memory access instructions for 4A and 4B
II) PRPG (40pts)
Introduce your project by answer the following questions:
Q1: Which level does your project achieve? Which PRPG algorithm did your group choose? Why?
(up to 5pts will be given to the group(s) which chose the rarest PRPG algorithm.)
Q2: How do you verify the correctness of your python simulator, and PRPG code? What kind of
resources (productivity tools, collaboration tools) did your group use to work on this project? Give
an example of a bug (either in MIPS or python) that your group found out.
Show the results and screenshots of your python simulator for your PRPG code, for the
following seed values:
S0 = 3
S0 = 19
S0 = 24
S0 = 100
S0 = 2019
S0 = 34567
•
30 pts for showing the results of Part A correctly, including:
– PC value
– Instruction Count
– Register Values ($8 – $23)
– Memory values M[0x2010] – M[0x204C] containing S0 – S15
•
10 pts for showing the results of Part B correctly, including:
– average of S0 – S15, in M[0x200C]
– average Hamming Weight for S0 – S15, in M[0x2000]
III) “special instruction” for faster execution (10 pts extra credit)
•
•
•
If you chose to implement a special instruction to lower the Instruction Count, introduce the
reason of doing so, its detailed functionality, and encoding format.
Working with a special instruction that is not supported by MIPS can be hard to verify – you
cannot try it on MARS and see if your result is correct. How did you ensure that the code is
correct and the debugging process is easy to handle?
Provide a comparison for two versions of the same PRPG algorithms, with and without your
special instruction, for the above 6 seeds, to show the difference in Instruction Count. You will
need also to attach the two prpg_w_special.txt and prpg_wo_special.txt file in your report and
Bb submission.
Appendix
(-10pts if missing) Present all your code files here, including:
•
group_x_p2_sim.py:
Python code for simulator
•
group_x_p2_prpg.txt:
MIPS machine code for the prpg program
•
group_x_p2_1B.txt:
MIPS machine code by your design
a. to test the arithmetic instructions
•
group_x_p2_2B.txt:
MIPS machine code by your design
a. to test the logic instructions
•
group_x_p2_3B.txt:
and, ori, sll, srl
MIPS machine code by your design
a. to test the branch instructions
•
group_x_p2_4B.txt:
addi, addu, sub, slt
beq, bne
MIPS machine code by your design
a. to test the memory instructions
lw, sw
Reference: machine code encoding for the minimum set of supported instructions:
(http://www.mrc.uidaho.edu/mrc/people/jff/digital/MIPSir.html )
ADDI — Add immediate (with overflow)
Description: Adds a register and a sign-extended immediate value and stores the result in a register
Operation:
$t = $s + imm; advance_pc (4);
Syntax:
addi $t, $s, imm
0010 00ss ssst tttt iiii iiii iiii iiii
Encoding:
ADDU — Add unsigned (no overflow)
Description: Adds two registers and stores the result in a register
Operation:
$d = $s + $t; advance_pc (4);
Syntax:
addu $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 0001
Encoding:
SUB — Subtract
Description: Subtracts two registers and stores the result in a register
Operation:
$d = $s – $t; advance_pc (4);
Syntax:
sub $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 0010
Encoding:
SLT — Set on less than (signed)
Description: If $s is less than $t, $d is set to one. It gets zero otherwise.
Operation:
if $s < $t $d = 1; advance_pc (4); else $d = 0; advance_pc (4);
Syntax:
slt $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 1010
Encoding:
AND -- Bitwise and
Description: Bitwise ands two registers and stores the result in a register
Operation:
$d = $s & $t; advance_pc (4);
Syntax:
and $d, $s, $t
0000 00ss ssst tttt dddd d000 0010 0100
Encoding:
ORI -- Bitwise or immediate
Description: Bitwise ors a register and an immediate value and stores the result in a register
Operation:
$t = $s | imm; advance_pc (4);
Syntax:
ori $t, $s, imm
0011 01ss ssst tttt iiii iiii iiii iiii
Encoding:
SLL -- Shift left logical
Shifts a register value left by the shift amount listed in the instruction and places the
Description:
result in a third register. Zeroes are shifted in.
Operation:
$d = $t << h; advance_pc (4);
Syntax:
sll $d, $t, h
0000 00ss ssst tttt dddd dhhh hh00 0000
Encoding:
SRL -- Shift right logical
Shifts a register value right by the shift amount (shamt) and places the value in the
Description:
destination register. Zeroes are shifted in.
Operation:
$d = $t >> h; advance_pc (4);
Syntax:
srl $d, $t, h
0000 00– —t tttt dddd dhhh hh00 0010
Encoding:
BEQ — Branch on equal
Description: Branches if the two registers are equal
Operation:
if $s == $t advance_pc (4 + offset << 2)); else advance_pc (4);
Syntax:
beq $s, $t, offset
0001 00ss ssst tttt iiii iiii iiii iiii
Encoding:
BNE -- Branch on not equal
Description: Branches if the two registers are not equal
Operation:
if $s != $t advance_pc (4 + offset << 2)); else advance_pc (4);
Syntax:
bne $s, $t, offset
0001 01ss ssst tttt iiii iiii iiii iiii
Encoding:
LW -- Load word
Description: A word is loaded into a register from the specified address.
Operation:
$t = MEM[$s + offset]; advance_pc (4);
Syntax:
lw $t, offset($s)
1000 11ss ssst tttt iiii iiii iiii iiii
Encoding:
SW -- Store word
Description: The contents of $t is stored at the specified address.
Operation:
MEM[$s + offset] = $t; advance_pc (4);
Syntax:
sw $t, offset($s)
1010 11ss ssst tttt iiii iiii iiii iiii
Encoding:
...
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